On Sandy Bridge and Ivy Bridge, voting rights were lost by any threads in C1e/C3/C6 states. First, when all threads went into one of these C-states on a socket, no core on that socket would have voting rights and the core frequency would drop to the minimum frequency. In Haswell, Intel introduced the Integrated Voltage Regulator .
However, it provided generally consistent performance behavior. All cores maintained voting rights even when they were in C1e/C6 states . However, a package C1e state was also used, which visit site detected certain conditions when all threads were in a C1 or deeper state and would decrease the frequency to an efficient level.
P-states are managed as a ratio of a base clock frequency . On the Nehalem generation, the bclk ran at 133 MHz. If the OS requested a ratio of 20, then the system would run at 2.66 GHz. All Xeon processors starting with Sandy Bridge have used a 100 MHz bclk. The Avoton architecture had a variable bclk that was based on the memory frequency of the system. Each different ratio is commonly referred to as a bin of frequency. It is not possible to control frequency at granularity smaller than the bclk speed.
As shown in Figure 2-8, the voltage savings from decreasing frequency shrinks at lower frequencies . Decreasing frequencies past the point of voltage scaling is possible, but it tends to be inefficient. Users are better off using C-states at this point to save power.
A module refers to a collection of cores that share resources. On Intel Atom-based server processors such as Avoton, groups of two cores share a single L2 cache. Other groupings are theoretically possible, such as sharing a single voltage/frequency domain. C-states are also possible at the module level and are commonly referred to as MCx . All cores are in CC3/CC6 and other traffic sources are also idle. Package scoped operations, such as deep memory self-refresh or uncore Vret are possible. All cores are in CC3/CC6, but PCIe or a remote socket is still active.
This enables individual cores to have their own voltage domains, enabling efficient per core P-states . Low-dropout regulators can also be used to provide variable voltages across cores in a CPU with a single input voltage, but such a technique has not been productized by Intel to date.
The shared uncore must still be active to support these other traffic sources. Minimal package-scoped optimizations can be performed here.
As a result, processors have a minimum supported operating frequency and may not expose lower frequencies to the operating system or allow lower frequencies to be requested. Module C-states have not been used as aggressively as core and package C-states in production on servers due to challenges in finding energy-efficient optimizations with them in server environments. These issues are similar to those observed with the flushed L3 cache in package C-states.
